Increasing the density of integrated circuits can increase speed and enable new applications. The increased density can increase undesirable electrical interactions between adjacent circuit elements and conducting lines. Unwanted interactions are typically prevented by providing trenches that are filled with electrically insulating material to isolate the elements both physically and electrically. As circuit densities increase, however, the widths of these trenches decrease, increasing their aspect ratios and making it progressively more difficult to fill the trenches without leaving voids. A trench which is not completely filled is undesirable since the degree of isolation may be compromised, thus limiting the maximum operational frequency or otherwise adversely affecting operation of the integrated circuit.
Common techniques that are used in such gapfill applications are chemical-vapor deposition (“CVD”) techniques. Conventional thermal CVD processes supply reactive gases to the substrate surface where heat-induced chemical reactions take place to produce a desired film. Plasma-enhanced CVD (“PECVD”) techniques promote excitation and/or dissociation of the reactant gases by the application of radio-frequency (“RF”) energy to a reaction zone near the substrate surface creating a plasma. The high reactivity of the species in the plasma reduces the energy required for a chemical reaction to take place, and thus lowers the temperature required for such CVD processes when compared with conventional thermal CVD processes. These advantages may be further exploited by high-density-plasma (“HDP”) CVD techniques, in which a dense plasma is formed at low vacuum pressures so that ionized reactants form a greater percentage of the total reactant population. While each of these techniques falls broadly under the umbrella of “CVD techniques,” each of them has characteristic properties that make them more or less suitable for certain specific applications.
In some instances where trenches have a large aspect ratio and narrow width, trenches have been filled with each of these CVD techniques using a “dep/etch/dep” process involving sequentially depositing material, etching some of it back, and depositing additional material. The etching step acts to reshape the partially filled trench, opening it so that more material can be deposited before it closes up and leaves an interior void. The etching step can penetrate through deposited material and damage underlying layers especially near the tops of trenches or vias. In the case of shallow trench isolation (STI) the underlying semiconductor and/or protective silicon nitride barrier layer may be damaged which can cause device instability. Device reliability is generally at risk when the etching step is allowed to remove too much material.